In general, there may be a variety of applications in microelectronics, microsystems, biomedical, and other fields for thin chips or ultra-thin chips being formed for example on a carrier having a thickness in the range of about several tens of micrometers, e.g. on a silicon wafer with a thickness less than about 50 μm. One method for fabricating such thin or ultra-thin wafers may be wafer grinding. Wafer grinding techniques as commonly applied for thinning wafers based on a mechanical treatment of the wafer may introduce defects into the wafer, and may be difficult to control, which may lead to yield loss and therefore high cost. However, there may be attempts for manufacturing ultra-thin chips based on wafer pre-processing, wherein after the CMOS processing each single chip of a plurality of ultra-thin chips may be removed separately from the pre-processed wafer via a so-called Pick, Crack & Place™ process.